Method for isolating hybrid device in image sensor

ABSTRACT

The present invention relates to a method for fabricating an image sensor capable of improving a dark current characteristic. The method includes the steps of: forming sequentially a pad oxide layer and a pad nitride layer on a substrate and selectively removing the pad oxide layer and the pad nitride layer to expose a surface of the substrate in which a field insulation layer will be formed; forming the field insulation layer by performing a channel stop ion-implantation process to the exposed substrate with use of the pad nitride layer as a mask; removing a partial portion of the pad nitride layer so that one side of the pad nitride layer is spaced out with a predetermined distance from an edge of the field insulation layer; and performing an additional ion-implantation process onto the exposed substrate surface and the field insulation layer by using the pad nitride layer as a mask.

FIELD OF THE INVENTION

[0001] The present invention relates to an image sensor; and, more particularly, to an image sensor capable of decreasing a dark current generation through the use of a hybrid device isolation process.

DESCRIPTION OF RELATED ARTS

[0002] Generally, image sensor is a semiconductor device that converts an optical image into an electrical signal. Particularly, a charge coupled device (CCD) is a device wherein an individual metal-oxide-silicon (MOS) capacitor is closely allocated to each other, and an electrical carrier is stored and transferred to the MOS capacitor. A complementary metal-oxide semiconductor device (CMOS) image sensor is a device that forms MOS transistors as the same number of pixels and adopts a switching mode for sequentially detecting outputs with use of the MOS transistors by employing CMOS technology using a control circuit and a signal processing circuit as periphery circuits.

[0003] However, there are several problems of using the CCD due to its complex driving mode, high power dissipation, a complex process having lots of steps for a mask process and a difficulty in one chip realization since the signal processing circuit cannot be constructed on a CCD chip. Therefore, there has been actively researched on the CMOS image sensor that uses sub-micron CMOS technology to overcome the above problems. The CMOS image sensor obtains an image by forming a photodiode and a MOS transistor within a unit pixel and then sequentially detecting signals through a switching mode. The use of the CMOS technology results in less power dissipation and an enabled one-chip process for the signal processing circuit. Also, compared to the CCD process that requires approximately 30 to 40 masks, the CMOS image sensor implemented with the CMOS technology needs approximately 20 masks because of a simplified process. Hence, the CMOS, image sensor is currently highlighted as a next generation image sensor.

[0004] In a typical image sensor, dark currents are produced more easily, resulting in decreases in function and capability of storing charges. More detailed explanation on the dark current will be provided in the following.

[0005] Electrons, that move to a floating diffusion region from a photodiode, produce dark currents even in an absence of light. Particularly, the dark currents are caused by a dangling bond or various defects such as a line defect, a point defect and so forth that mainly exist in edges of an activation region. Such dark current may cause severe problems in a low illumination environment.

[0006] In a CMOS image sensor to which a technology of providing a device line-width of about 0.35 μm or about 0.25 μm, as an area of a photodiode region decreases, a ratio of a perimeter of the photodiode region with respect to the area of the photodiode region decreases as well.

[0007] The above feature is illustrated in FIG. 1. Referring to FIG. 1, since three surfaces of the photodiode except for a surface in which a transfer transistor will be formed are touched to a field insulation layer, the photodiode is affected in more extents by same defects generated at edges of the filed insulation layer as the photodiode area decreases due to micronization of a device. Herein, the perimeter of the photodiode is calculated by taking only the three surfaces touching to the filed insulation layer.

[0008] This effect of increasing dark current generations with respect to an image signal is pronounced as a minimum line-width, e.g., about 0.25 μm or 0.18 μm decreases. In other words, such CMOS image sensor with an ultra fine line-width more easily causes the dark current.

SUMMARY OF THE INVENTION

[0009] It is, therefore, an object of the present invention to provide a method for isolating a hybrid device in an image sensor through an improvement on a dark current characteristic even if an area of a photodiode region decreases.

[0010] In accordance with an aspect of the present invention, there is provided a method for isolating a hybrid device in an image sensor including a photodiode, the method including the steps of: forming sequentially a pad oxide layer and a pad nitride layer on a substrate and selectively removing the pad oxide layer and the pad nitride layer to expose a surface of the substrate in which a field insulation layer will be formed; forming the field insulation layer by performing a channel stop ion-implantation process to the exposed substrate with use of the pad nitride layer as a mask; removing a partial portion of the pad nitride layer so that one side of the pad nitride layer is spaced out with a predetermined distance from an edge of the field insulation layer; and performing an additional ion-implantation process onto the exposed substrate surface and the field insulation layer by using the pad nitride layer as a mask.

BRIEF DESCRIPTION OF THE DRAWING(S)

[0011] The above and other objects and features of the present invention will become apparent from the following description of the preferred embodiments given in conjunction with the accompanying drawings, in which:

[0012]FIG. 1 is an exemplary diagram showing a ratio of a photodiode perimeter with respect to a photodiode area in a typical image sensor;

[0013]FIGS. 2A to 2D are cross-sectional views showing a hybrid device isolation process in an image sensor in accordance with a preferred embodiment of the present invention;

[0014]FIG. 3 is a cross-sectional view showing a device isolation process with a trench structure in accordance with-another preferred embodiment of the present invention;

[0015]FIG. 4A is a plane view showing a layout of a photodiode and a transfer transistor in a unit pixel of a complementary metal-oxide semiconductor (CMOS) image sensor in accordance with another preferred embodiment of the present invention; and

[0016]FIG. 4B is a cross-sectional view with respect to a line A-A′ of FIG. 4A illustrating the photodiode and the transfer transistor in the unit pixel of the CMOS image sensor formed in accordance with the above preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0017]FIGS. 2A to 2D are cross-sectional views showing a device isolation process in an image sensor in accordance with a preferred embodiment of the present invention.

[0018] Referring to FIG. 2A, a pad oxide layer 11, a pad nitride layer 12 and a photosensitive layer 13, which will be used as a device isolation mask in subsequent processes, are sequentially formed on a substrate 10. Then, a device isolation mask process is performed to a region where a field insulation layer will be formed. In the present invention, the substrate 10 can use a stack structure wherein an epitaxial layer with a low concentration is deposited on a silicon layer with a high concentration.

[0019] The reason for using the lowly concentrated epitaxial layer is because it is possible to improve device properties by increasing a depth of a depletion layer of a photodiode and to prevent a cross-talk phenomenon between unit pixels in a substrate with a high concentration.

[0020] Referring to FIG. 2B, the pad nitride layer 12 and the pad oxide layer 11 are etched with use of the device isolation mask 13 so as to expose a surface of the substrate 10 in which the field insulation layer will be formed. The device isolation mask 13 is removed thereafter.

[0021] Next, a channel stop ion implantation is performed to the surface of the substrate 10 by using the exposed pad nitride layer 12 as an ion-implantation mask so as to form a channel stop ion-implantation region 100. For the channel stop ion-implantation, an ion-implantation concentration of boron and ion-implantation energy are about 3.0×10¹³ cm⁻³ and about 30 keV, respectively. The above channel stop ion-implantation process is proceeded without giving a tilt angle and a ration.

[0022] With reference to FIG. 2C, the surface of the substrate 10 completed with the channel stop ion-implantation process is then proceeded with a thermal oxidation process so as to grow the field insulation layer, particularly, a field oxide layer (Fox). On the pad nitride layer 12, a photosensitive pattern 14 is subsequently formed to etch the pad nitride layer 12 with a predetermined distance X from an edge of the Fox. At this time, the predetermined distance X preferably ranges from about 0.5 μm to about 1.0 μm.

[0023] With reference to FIG. 2D, the pad nitride layer 12 is etched with the predetermined distance X from the edge of the Fox by using the photosensitive pattern 14 as an etch mask. Subsequently, a boron ion-implantation process is performed by using the etched pad nitride layer 12 as an ion-implantation mask.

[0024] At this time, the boron ion-implantation process can be carried out at the same condition of the channel stop ion-implantation process or can be carried out by using a boron concentration ranging from about 4.0×10¹³ cm⁻³ to about 5.0×10¹³ cm⁻³. Such an optimal dosing concentration is determined after receiving a feedback about a dark current characteristic.

[0025] Referring to FIG. 2D, denoted numerical symbols, {circumflex over (1)} and {circumflex over (2)}, represent the channel stop ion-implantation region 100 and a boron ion-implantation region 50 additionally formed through the boron ion implantation process, respectively. Also, as shown, the photosensitive pattern 14 is removed after completing the additional boron ion-implantation process.

[0026] In accordance with the preferred embodiment of the present invention, the boron ion-implantation region 50 screens the edges of the Fox, thereby improving the dark current characteristic. That is, electrons generated at the edges of the Fox are disappeared through an electron hole pair recombination phenomenon at the boron ion-implantation region 50.

[0027]FIG. 3 is a plane view showing a device isolation process with a trench structure in another preferred embodiment of the present invention. A channel stop ion-implantation region {circumflex over (1)} and a boron ion-implantation region {circumflex over (2)} are illustrated in FIG. 3.

[0028] The following is a detailed description on a preferred embodiment of a process for forming a device isolation region having a trench structure.

[0029] A buffer oxide layer (not shown) and a pad nitride layer (not shown) are sequentially deposited on a substrate 20. Then, a device isolation mask is used to selectively etch the buffer oxide layer and the pad nitride layer so that a region, in which a trench will be formed, is exposed. Afterwards, the trench is formed on the substrate 20 with use of the pad nitride layer as an etch mask. Subsequent to the trench formation, an oxide layer is formed in an inner wall of the trench in order to compensate damages of the inner wall of the trench that occurs when proceeding the etch process for forming the trench.

[0030] Next, a channel stop ion-implantation process is performed to form the channel stop ion-implantation region {circumflex over (1)} and bury the trench with an insulation material 21. The insulation material 21 is planarized through a chemical mechanical polishing (CMP) process, and then, a predetermined portion of the pad nitride layer is etched in such a manner that one side of the pad nitride layer is spaced out with a predetermined distance from the insulation material 21.

[0031] After the above etching process, a boron ion-implantation process is additionally performed by using the pad nitride layer as an ion-implantation mask so as to form a boron ion-implantation region {circumflex over (2)} on the exposed substrate 20 and the insulation material 21. The pad nitride layer is removed thereafter, whereby the device isolation region with a shallow trench isolation structure is completely formed.

[0032] In addition to a typical device isolation process with a local oxidation of silicon (LOCOS) structure, the present invention can be also applied to a device isolation process with a trench structure or a poly buffered locos (PBL) process.

[0033]FIG. 4A is a plane view showing a photodiode and a transfer transistor in a unit pixel of a complementary metal-oxide semiconductor (CMOS) image sensor formed in accordance with another preferred embodiment of the present invention. Especially, a boron doping profile is formed by being spaced out with a predetermined distance in a photodiode region contacting to a Fox (not shown). A boron ion-implantation region additionally ion-implanted encompasses edges of the Fox, and this fact provides an effect of decreasing dark currents even if an n-type ion-implantation region for a photodiode is not decreased to a size fit within a dotted boundary. It is also possible to prevent a decrease of saturation currents since the n-type ion-implantation region for the photodiode is not necessarily required to be decreased for improving the dark current characteristic.

[0034]FIG. 4B is a cross-sectional view showing the photodiode region and the transfer transistor from a viewpoint of the A-A′ line shown in FIG. 4A.

[0035] The structure shown in FIG. 4B includes a Fox layer 31 formed on a substrate 30, a channel stop ion-implantation region 32A formed on a bottom of the Fox layer 31, a boron ion-implantation region 32B extended with a predetermined distance from an edge of the Fox layer 31, an n-type ion-implantation region 34 for a photodiode formed within the substrate 30 and contacted to one side of the Fox layer 31, a spacer 35 formed on lateral sides of a gate electrode 33 of the transfer transistor, a p-type ion-implantation region 36 for a photodiode formed in between a surface of the substrate 30 and the n-type ion-implantation region 34 for the photodiode and a floating diffusion region 37 formed on the other side of the p-type ion-implantation region 36 for the photodiode and the transfer transistor. Herein, one side of the p-type ion implantation region 36 for the photodiode is contacted to the spacer 35 and the other side is contacted to the boron ion-implantation region 32B.

[0036] As shown, the boron ion-implantation region 32B extended with the predetermined distance from an edge of the Fox layer 31 screens the edge of the Fox layer 31, and this encompassing action suppresses dark currents generated from the edge of the Fox layer.

[0037] In case of implementing this inventive method to an image sensor, it is possible to improve the dark current characteristic even in a micronized structure through the use of this hybrid device isolation technique. Also, a photodiode region is not necessarily required to be decreased to make an improvement on the dark current characteristic. Therefore, it is possible to obtain a clearer and well-defined image since saturation currents can be also decreased.

[0038] While the present invention has been described with respect to certain preferred embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the scope of the invention as defined in the following claims. 

What is claimed is:
 1. A method for isolating a hybrid device in an image sensor including a photodiode, the method comprising the steps of: forming sequentially a pad oxide layer and a pad nitride layer on a substrate and selectively removing the pad oxide layer and the pad nitride layer to expose a surface of the substrate in which a field insulation layer will be formed; forming the field insulation layer by performing a channel stop ion-implantation process to the exposed substrate with use of the pad nitride layer as a mask; removing a partial portion of the pad nitride layer so that one side of the pad nitride layer is spaced out with a predetermined distance from an edge of the field insulation layer; and performing an additional ion-implantation process onto the exposed substrate surface and the field insulation layer by using the pad nitride layer as a mask.
 2. The method as recited in claim 1, wherein, at the step of removing the portion of the pad nitride layer is performed in a manner that the pad nitride layer is spaced out with the predetermined distance from the edge of the filed insulation layer, the predetermined distance ranges from about 0.5 μm to about 1.0 μm.
 3. The method as recited in claim 1, wherein the ion-implantation process is performed with use of boron.
 4. The method as recited in claim 3, wherein the boron ion-implantation process is proceeded by employing ion-implantation energy of about 30 keV and dose amounts of boron in a range between about 4.0×10¹³ cm⁻³ to about 5.0×10¹³ cm⁻³. 